Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2007-05-01
2007-05-01
Lamarre, Guy J. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S771000, C714S775000, C714S785000, C714S786000, C375S240280, C370S510000
Reexamination Certificate
active
10743453
ABSTRACT:
A data processing apparatus according an aspect of this invention has a syndrome calculation unit configured to calculate the syndrome of a demodulated data sequence. The syndrome calculation unit includes a calculation unit configured to make the calculation required to realize syndrome calculation of demodulated data for each frame obtained by removing the sync code from one sync frame.
REFERENCES:
patent: 5438692 (1995-08-01), Mohindra
patent: 6697989 (2004-02-01), Maeda et al.
patent: 11-066762 (1999-03-01), None
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patent: 11-282701 (1999-10-01), None
patent: 2001-67822 (2001-03-01), None
patent: 2002-74861 (2002-03-01), None
Japanese Office Action dated Apr. 12, 2005 for Appln. No. 2002-380279.
Kabushiki Kaisha Toshiba
Lamarre Guy J.
Pillsbury Winthrop Shaw & Pittman LLP
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