Data processing apparatus and image reading apparatus

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing

Reexamination Certificate

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Details

C711S150000, C711S002000

Reexamination Certificate

active

07603536

ABSTRACT:
A data processing apparatus includes a data processing section that issues a plurality of data transfer requests simultaneously; an internal memory provided inside a circuit including the data processing section; an internal memory control section that performs an access control for the internal memory; an external memory that exchanges data with the data processing section via an external bus; an external memory control section that performs an access control for the external memory; and a memory selecting section that assigns to at least one of the internal memory and the external memory a data transfer request from the data processing section.

REFERENCES:
patent: 6381686 (2002-04-01), Imamura
patent: 6393520 (2002-05-01), Yoshikawa et al.
patent: 6678065 (2004-01-01), Hikawa
patent: 61-227475 (1986-10-01), None
patent: 5-046473 (1993-02-01), None
patent: 7-273931 (1995-10-01), None
patent: 11-003324 (1999-01-01), None
patent: 11-003324 (1999-01-01), None
patent: 2003-061029 (2003-02-01), None
patent: 2004-110299 (2004-04-01), None
Notification of Reasons for Rejection mailed Sep. 25, 2007 in Japanese Application No. 2005-192950 and English Translation thereof.

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