Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-03-25
1999-11-09
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
712207, 711159, G06F 1208
Patent
active
059833246
ABSTRACT:
When the OS judges that a read request to the secondary storage device from the user process is the sequential access, the OS judges whether prefetching is to be stopped before the data succeeding to the data designated by the request is prefetched, so as to decrease replacement of data prefetched to the main memory by other data before the data is used. The judgment is executed to prevent that succeeding data from being replaced by other data after the succeeding data is prefetched to the cache area in the main memory. That is, it is judged whether the data requested by the read request has already been prefetched, and has already been replaced by other data before the requested data is used by the user process, if the requested data has been prefetched. When these two conditions are met, prefetch is useless. The prefetching accompanying this read request is not executed, the prefetch stop flag is set, and prefetching is prohibited to the succeeding sequential access by this prefetch stop flag. The technology is also disclosed which controls allocation of the cache entries so that a cache entry which holds prefetched data is not used to hold other data before the data is used.
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Fujita Fujio
Shimizu Masaaki
Ukai Toshiyuki
Chan Eddie P.
Encarnacion Yamir
Hitachi , Ltd.
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