Data path configurable for multiple clocking arrangements

Details Data path configurable for multiple clocking arrangements Data path configurable for multiple clocking arrangements

2006-11-07

2006-11-07

Chang, Daniel (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Sequential or with flip-flop

C326S093000, C327S202000, C327S407000

Reexamination Certificate

active

07132854

ABSTRACT:
A data path (200) can be configured to accommodate different clocking arrangements. In one mode, data values may be output at a single data rate: one data value every clock cycle. In another mode, data values may be output at a double data rate: two data values every clock cycle. A data path (200) can be compact circuit structure, needing only an additional mode multiplexer (206) and inverter over a conventional D-type master-slave flip-flop.

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