Electrical computers and digital data processing systems: input/ – Input/output data processing – Data transfer specifying
Reexamination Certificate
2005-02-09
2008-10-14
Patel, Niketa I. (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Data transfer specifying
C710S015000, C710S017000, C710S044000, C710S056000
Reexamination Certificate
active
07437489
ABSTRACT:
A data packet queue handling method and system is proposed, which is designed for use with a computer system having a data packet generating unit, a data packet transfer interface, a data packet processing unit, and a memory unit, wherein the data packet generating unit is capable of generating a sequence of data packets which are transferred via the data packet transfer interface to the data packet processing unit. The proposed method and system is capable of providing a novel data packet queue handling capability that can help prevent the occurrence of a deadlock condition in the computer system due to a memory-sufficient condition in the memory unit, so that the overall throughput of the computer system can be ensured.
REFERENCES:
patent: 6754732 (2004-06-01), Dixon et al.
patent: 6851008 (2005-02-01), Hao
patent: 7145869 (2006-12-01), Kadambi et al.
Inventec C'orporation
Jianq Chyun IP Office
Patel Niketa I.
Vidwan Jasjit
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