Data output device and method of semiconductor device

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering

Reexamination Certificate

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C710S058000, C710S309000, C326S086000

Reexamination Certificate

active

11162168

ABSTRACT:
A data output device is disclosed having a first comparator for comparing first output data with arbitrary output data on a bit-by-bit basis and outputting a first pre-flag signal, a second comparator for comparing second output data with the first output data on a bit-by-bit basis and outputting a second pre-flag signal, first and second logic units for performing logic operations with respect to pre-flag signals and data inversion flag signals, a first output unit for inverting or non-inverting and outputting a plurality of bits contained in the first output data in response to the first data inversion flag signal, a second output unit for inverting or non-inverting and outputting a plurality of bits contained in the second output data in response to the second data inversion flag signal, and an output data initializer for, when a no-operation period is generated in a series of data output operations, initializing the arbitrary output data and supplying the resulting data to the first comparator.

REFERENCES:
patent: 5784110 (1998-07-01), Acampora et al.
patent: 6112268 (2000-08-01), Ohashi et al.
patent: 2001/0007115 (2001-07-01), Yim et al.
patent: 2005/0002223 (2005-01-01), Coteus et al.
patent: 2007/0011481 (2007-01-01), Kwack et al.
patent: 6289154 (1994-10-01), None
Kwack et al., “A Pre-DBI(PDBI) method for Giga Hz DRAM's”, The 12th Korean Conference on Semiconductors, COEX Conference Center, http://kcs.cosar.or.kr, Feb. 24-25, 2005, pp. 12, 395-396.

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