Static information storage and retrieval – Read/write circuit – Testing
Patent
1997-01-16
1998-01-13
Nelms, David C.
Static information storage and retrieval
Read/write circuit
Testing
36518905, 36518907, G11C 2900
Patent
active
057086141
ABSTRACT:
In a method of testing a semiconductor memory device having a pipeline structure, a same data is stored in a plurality of memory cells in advance. The stored data are read out from the plurality of memory cells to produce data signals and amplified as the data signals. A determining section determines whether all the data signals are same, to generate a determination result signal. In accordance with the determination result signal, one of signals associated with the amplified data signals and predetermined signals are transferred to an output section in synchronous with a synchronous signal. The output section includes a plurality of output circuits each of which provides, as an indication signal, one of a low level signal, a high level signal and a signal indicative of a high impedance state in response to each of the transferred signals. Therefore, using at least one of the indication signals, whether the plurality of memory cells are correctly operable can be tested.
REFERENCES:
patent: 5293341 (1994-03-01), Tsujimoto
patent: 5400282 (1995-03-01), Suzuki
patent: 5428575 (1995-06-01), Fudeyasu
Mai Son
NEC Corporation
Nelms David C.
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