Data output circuit with minimum power source noise

Static information storage and retrieval – Read/write circuit – Noise suppression

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36518905, 307473, 307443, 307270, H03K 301

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active

053413385

ABSTRACT:
A data output circuit suitable for an integrated circuit operable at a high bit rate and having a plurality of bits of outputs. A first output transistor has a conduction path whose one electrode is connected to an output terminal, and a control electrode for controlling the conduction path in response to a first signal. A second output transistor has a conduction path whose one electrode is connected to the output terminal, and a control electrode for controlling the conduction path in response to a second signal complementary to to the first signal. A switch transistor has a conduction path having one electrode connected to the other electrode of the conduction path of the first output transistor and the other electrode connected to a first power source, and a control electrode for rendering the conduction path conductive in response to a switch signal which occurs after the first signal. A capacitor has one electrode connected to the other electrode of the first output transistor and the other electrode connected to a second power source. A plurality of such data output circuits may be mounted on a single integrated circuit, e.g., a semiconductor memory.

REFERENCES:
patent: 4982380 (1991-01-01), Koike
patent: 5023472 (1991-06-01), Hashimoto et al.
patent: 5060196 (1991-10-01), Pae et al.
patent: 5097149 (1992-03-01), Lee
patent: 5148048 (1992-09-01), Kawasaki et al.

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