Data output circuit, intermediate potential setting circuit, and

Details Data output circuit, intermediate potential setting circuit, and Data output circuit, intermediate potential setting circuit, and

1995-07-27

1997-12-16

Westin, Edward P.

Electronic digital logic circuitry

Interface

Current driving

326 17, 326 27, H03K 190948, H03K 19017

Patent

active

056989946

ABSTRACT:
An intermediate potential setting circuit includes two MOS transistors having different conductivity types and connected in series between reference power supplies, first and second gate control units, respectively connected to gates of the transistors, for separately ON/OFF-controlling the transistors, a load capacitor connected between the connection node of the transistors and one of the reference power supplies, a control unit, connected between the connection node and the first and second gate control units, for feeding back a potential of the connection node to the first and second gate control units to selectively perform control to turn on the transistors, an external control unit for externally supplying a control signal to the first and second gate control units, and an output terminal, connected to the connection node, for extracting an intermediate potential output as a potential of the load capacitor.

REFERENCES:
patent: 4988888 (1991-01-01), Hirose et al.
patent: 5166558 (1992-11-01), Ohsawa
patent: 5179300 (1993-01-01), Rolandi et al.
patent: 5306965 (1994-04-01), Asprey
patent: 5377149 (1994-12-01), Gaultier
patent: 5420525 (1995-05-01), Maloberti et al.
patent: 5450019 (1995-09-01), McClure et al.
patent: 5491432 (1996-02-01), Wong et al.

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