Data output buffer pull-down circuit for TTL interface

Details Data output buffer pull-down circuit for TTL interface Data output buffer pull-down circuit for TTL interface

1993-04-22

1995-05-23

Hudspeth, David R.

Electronic digital logic circuitry

Interface

Logic level shifting

326 81, 326 58, H03R 19094

Patent

active

054184770

ABSTRACT:
A pull-down circuit for a TTL compatible data output buffer uses NMOS devices. The pull-down circuit comprising two NMOS stages. Namely, a diode configuration stage where the gate and drain electrodes are shorted together during pull-down and a common-source stage. Both PMOS and NMOS devices are used for shorting the gate and drain electrodes.

REFERENCES:
patent: 4307308 (1981-12-01), Sano
patent: 4430582 (1984-02-01), Bose et al.
patent: 5144165 (1992-09-01), Dhong et al.
patent: 5206545 (1993-04-01), Huang
patent: 5274284 (1993-12-01), Krenik et al.
patent: 5282176 (1994-01-01), Allen et al.
R. C. Flaker et al, "Three to Five Volt Off Chip Driver Interface Circuit", Research Disclosure, May 1987, No. 277.

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