Data output buffer of a semiconducter memory device

Details Data output buffer of a semiconducter memory device Data output buffer of a semiconducter memory device

1995-02-03

1996-07-09

Zarabian, A.

Static information storage and retrieval

Addressing

Sync/clocking

36518905, G11C 800

Patent

active

055351719

ABSTRACT:
A data output buffer of a semiconductor memory device using a clock having a fixed period from outside. The data output buffer has a data input part controlled and synchronized with a clock, for inputting data; a data latch device for latching data output through the data input part to thereby set up a predetermined delay time; a control signal input part controlled by the clock, for inputting a control signal; a latch controller for latching the control signal output through the control signal input part during a given time; a data output driver for receiving an output signal from the data latch device, the data output driver being controlled by the output signal of the latch controller; and an output device connected to the data output driver, for providing the data.

REFERENCES:
patent: 5384735 (1995-01-01), Park
patent: 5402388 (1995-03-01), Wojcicki
patent: 5424983 (1995-06-01), Wojcicki
patent: 5430688 (1995-07-01), Takasugi

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