Data memory with sense amplifier and method of operation

Details Data memory with sense amplifier and method of operation Data memory with sense amplifier and method of operation

1995-01-27

1997-02-11

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

365194, 36523006, G11C 700

Patent

active

056027877

ABSTRACT:
A data memory includes a plurality of memory cells that are selectively operable during a memory read operation to generate a data signal indicative of data stored in that memory cell, and one or more sense amplifiers are connected to receive data signals from a plurality of the memory cells. An address decoder is responsive to a memory address supplied to the data memory for controlling one of said plurality of memory cells connected to each of the sense amplifiers to generate a respective data signal under the control of a first control signal. The data memory also includes circuitry for delaying the first control signal to generate a second control signal, and for energizing the one or more sense amplifiers for operation in response to the second control signal.

REFERENCES:
patent: 4050061 (1977-09-01), Kitagawa
patent: 5079449 (1992-01-01), Obata
patent: 5293343 (1994-03-01), Raab et al.
patent: 5325335 (1994-06-01), Ang et al.
patent: 5386389 (1995-01-01), Taoka
patent: 5416742 (1995-05-01), Takada
patent: 5416743 (1995-05-01), Allan et al.

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