Data masking circuits and methods for integrated circuit memory

Details Data masking circuits and methods for integrated circuit memory Data masking circuits and methods for integrated circuit memory

1998-10-14

2000-03-07

Nelms, David

Static information storage and retrieval

Addressing

Sync/clocking

365193, G11C 800

Patent

active

060349166

ABSTRACT:
External data and an external data masking signal are synchronized to a data strobe signal rather than a clock signal in an SDRAM. Since both the data masking signal and the data are synchronized with the data strobe signal, they can react in the same way to conditions such as voltage, temperature and process variations. Accordingly, the sampling window of the data can be larger and the number of pins for inputting the data masking signal need not increase. More specifically, integrated circuit memory devices include a memory cell array and an address buffer that buffers address data for the memory cell array in response to a clock signal. A command buffer buffers read and write commands for the memory cell array in response to the clock signal. The data input and output buffer buffers data for the memory cell array in response to a data strobe signal that is different from the clock signal. A data masking buffer buffers the data masking signal that masks the data in response to the data strobe signal. A circuit is responsive to the address buffer, the command buffer, the data input and output buffer and the data masking buffer, to produce first and second masked data on first and second data lines of the memory cell array.

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patent: 5946256 (1999-08-01), Okimura

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