Static information storage and retrieval – Floating gate – Particular connection
Patent
1999-10-08
2000-12-26
Nelms, David
Static information storage and retrieval
Floating gate
Particular connection
36518528, 36518529, 36523005, G11C 1604
Patent
active
061669539
ABSTRACT:
A semiconductor device having and electrically erasable and programmable nonvolatile memory, for example, a rewritable nonvolatile memory including memory cells arranged in rows and columns and disposed to facilitate both flash erasure as well as selective erasure of individual units of plural memory cells. The semiconductor device which functions as a microcomputer chip also has a processing unit and includes an input terminal for receiving an operation mode signal for switching the microcomputer between a first operation mode in which the flash memory is rewritten under control of a processing unit and a second operation mode in which the flash memory is rewritten under control of separate writing circuit externally connectable to the microcomputer.
REFERENCES:
patent: 4402065 (1983-08-01), Taylor
patent: 4698750 (1987-10-01), Wilkie et al.
patent: 4701886 (1987-10-01), Sakakibara
patent: 4783764 (1988-11-01), Tsuchiya et al.
patent: 4785425 (1988-11-01), Lavelle
patent: 4794558 (1988-12-01), Thompson
patent: 4796235 (1989-01-01), Sparks et al.
patent: 4807114 (1989-02-01), Itoh
patent: 4887234 (1989-12-01), Iijima
patent: 4953129 (1990-08-01), Kobayashi et al.
patent: 4974208 (1990-11-01), Nakamura et al.
patent: 4975878 (1990-12-01), Boddu et al.
patent: 5065364 (1991-11-01), Atwood et al.
patent: 5070473 (1991-12-01), Takano et al.
patent: 5088023 (1992-02-01), Nakamura et al.
patent: 5097445 (1992-03-01), Yamauchi
patent: 5109359 (1992-04-01), Sakakibara et al.
patent: 5175840 (1992-12-01), Sawase et al.
patent: 5185718 (1993-02-01), Rinerson et al.
patent: 5199001 (1993-03-01), Tzeng
patent: 5200600 (1993-04-01), Shinagawa
patent: 5222046 (1993-06-01), Kreifels et al.
patent: 5255237 (1993-10-01), Kodama
patent: 5255244 (1993-10-01), Dey
patent: 5283758 (1994-02-01), Nakayama et al.
patent: 5297096 (1994-03-01), Terada et al.
patent: 5305276 (1994-04-01), Uenoyama
patent: 5305284 (1994-04-01), Iwase
patent: 5321845 (1994-06-01), Sawase et al.
patent: 5329492 (1994-07-01), Mochizuki
patent: 5369647 (1994-11-01), Kreifels et al.
patent: 5377145 (1994-12-01), Kynett et al.
patent: 5390146 (1995-02-01), Atwood et al.
patent: 5402383 (1995-03-01), Akaogi
patent: 5418237 (1995-05-01), Harari et al.
patent: 5444664 (1995-08-01), Kuroda et al.
patent: 5566125 (1996-10-01), Fazio et al.
patent: 5581503 (1996-12-01), Matsubara et al.
patent: 5602738 (1997-02-01), Sasaki
patent: 5615159 (1997-03-01), Roohparvar
patent: 6064593 (2000-05-01), Matsubara et al.
EDN Electrical Design News, vol. 28, No. 21, Oct. 13, 1983, pp. 177-188.
Patent Abstracts of Japan, vol. 14, No. 542, Sep. 4, 1990, p. 1137.
Electronic Engineering, vol. 63, No. 775, Jul. 1991, p. 49.
IBM Technical Disclosure Bulletin, vo. 32, No. 10B, "Method of Reducing DRAM Power Dissipation with Segmented Bitlines, " pp. 141, 142.
Hitachi IC Memory Data Book, Sep. 1, 1981, p. 872.
"Block Structures in Flash Memory" Electronic Engineering, vol. 63, No. 775, Jul. 1, 1991, p. 49.
Morales, et al., "Adding EEPROM to ROM Expands IC Versatility," EDN Electrical Design News., vol. 28, No. 21, (1983) p. 177.
Ko-Min Chang, "A Modular Flash EEPROM Technology for 0.8.mu.m High Speed Logic Circuits," IEEE 191 Custom Integrated Circuits Conference, pp. 18.7.1-18.7.4.
Baba Shiro
Ito Takashi
Kuroda Kenichi
Matsubara Kiyoshi
Mukai Hirofumi
Hitachi , Ltd.
Hitachi VLSI Engineering Corporation
Ho Hoai V.
Nelms David
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