Data invalid signal for non-deterministic latency in a...

Details Data invalid signal for non-deterministic latency in a... Data invalid signal for non-deterministic latency in a...

2005-12-30

2009-08-04

Nguyen, Hiep T (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

Reexamination Certificate

active

07571297

ABSTRACT:
An apparatus, system, and method for a data invalid signal for non-deterministic latency in memory are described. The apparatus may include a memory to determine that data to be buffered for a data burst cannot be guaranteed in time to satisfy a deterministic latency parameter. The memory may provide an indication that the data cannot be guaranteed. Other embodiments are described and claimed.

REFERENCES:
patent: 5944805 (1999-08-01), Ricks et al.
patent: 7257632 (2007-08-01), Zhang et al.

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