Data I/O control signal generating circuit in a...

Static information storage and retrieval – Read/write circuit – Signals

Reexamination Certificate

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C365S193000, C365S233100, C365S233120, C365S196000, C365S207000

Reexamination Certificate

active

07978547

ABSTRACT:
A circuit for generating a data I/O control signal used in a semiconductor memory apparatus comprises a delay block for generating a delay signal having a relatively short delay value and a delay signal having a relatively long delay values, and a selection block for selecting any one of the delay signals according to an operational mode. The selection block selects an output signal of the first delay unit in a high-speed operation mode and selects an output signal of the second delay unit in a low-speed operation mode.

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