Data I/O circuit of flash memory device with improved data...

Details Data I/O circuit of flash memory device with improved data... Data I/O circuit of flash memory device with improved data...

2007-07-03

2007-07-03

Elms, Richard T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

Including signal comparison

C365S189050, C365S190000

Reexamination Certificate

active

11306473

ABSTRACT:
A data I/O circuit of a flash memory device includes a page buffer connected to at least one pair of bit lines, a page buffer select circuit arranged to output complementary input data, which is received through a pair of I/O lines, to the page buffer, or outputs complementary sensing data stored in the page buffer to the pair of I/O lines, in response to a buffer select signal, and a column select circuit arranged to output the complementary sensing data, which is received through the pair of I/O lines, to a pair of data I/O nodes, respectively, or to output the complementary input data, which is received through the pair of data I/O nodes, to the pair of I/O lines, in response to a column select signal and a gate control signal.

REFERENCES:
patent: 6980473 (2005-12-01), Bautista et al.
patent: 7006380 (2006-02-01), Toda
patent: 7142460 (2006-11-01), Lee et al.
patent: 2006/0155896 (2006-07-01), Lee et al.
patent: 2007/0019468 (2007-01-01), Seong et al.

Affiliated with

Also associated with

Rating

Data I/O circuit of flash memory device with improved data... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Data I/O circuit of flash memory device with improved data..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data I/O circuit of flash memory device with improved data... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3729232