Data-extraction circuitry for PCM communication system

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371 20, 371 22, 375 10, H04Q 1104, H04J 314

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active

044046308

ABSTRACT:
Incoming and outgoing lines on opposite sides of a PCM coupling network, each carrying a recurrent frame with a multiplicity of 8-bit channels which are to be individually tested, have branches extending to an input-side data extractor and an output-side data extractor of substantially identical construction co-operating with a control device such as a microprocessor serving to compare the data extracted in a given time slot from an incoming line with those extracted in a corresponding time slot from an outgoing line coupled thereto. Each extractor, realized in integrated circuitry, comprises a multiplexer for selecting one of the associated lines, a register storing the identity of the line to be selected, and presettable counters stepped by a time base synchronized with the PCM system for enabling the loading of an output register by the multiplexer at the instant when a byte of the desired channel appears on the chosen line. The line-identifying register and the presettable counters are loaded with numerical data from the control device with the aid of several cascaded decoders responsive to instruction from that device.

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