Coded data generation or conversion – Digital code to digital code converters – To or from run length limited codes
Reexamination Certificate
1999-02-23
2002-04-16
JeanPierre, Peguy (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from run length limited codes
C341S058000
Reexamination Certificate
active
06373407
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a system for encoding data, recording the encoded data, reproducing the recorded data, and decoding the reproduced data, and particularly relates to a method and a circuit for encoding and decoding data.
2. Description of the Related Art
The present invention relates to a data encoding method, a data decoding method and a circuit therefor. According to this method and circuit, errors in decoding data from read-back signals can be reduced when data to be recorded is converted into codes in an apparatus for encoding data. The method includes the steps of recording the encoded data, reproducing the recorded data, and decoding the reproduced data in a recording system.
For a better appreciation of the invention, the related art will be briefly described, including description about Viterbi decoding, Trellis representation, and partial response channels. Description will be made about a magnetic recording channel by way of example. The frequency response of a magnetic response channel is similar to that in which a differentiator and a low-pass filter are connected in series, as described in R. D. Cideciyan, F. Dolivo, R. Hermann, W. Hirt, and W. Schott, “A PRML (Partial Response Maximum Likelihood) System for Digital Magnetic Recording”, IEEE J. Select. Area Commun., Vol. 10, No. 1, pp. 38-56, January 1992. In addition, a magnetic recording channel is modeled as a partial response channel in which inter-symbol interference has an impulse response of (1−D)(1+D){circumflex over ( )}n (the n
th
power of (1+D)) (n=1,2,3 . . . ) where D represents a delay operator of one period. In any channel where inter-symbol interference can be modeled by (1−D)(1+D), binary codes of 1 and 0 (or more generally +a and −a) are made into ternary outputs of +1, 0 and −1 (or +c, 0 and −c).
In addition, any channel where impulse response can be modeled by (1−D)(1+D){circumflex over ( )}2 is referred to as PR4 or EPR4, and binary codes of 1 and 0 (or more generally +a and −a) are made into quinary outputs of +2, +1, 0, −1 and −2 (or +2c, +c, 0, −c and −2c). Further, any channel where impulse response can be modeled by (1−D)(1+D){circumflex over ( )}3 is referred to as extended EPR4 or EEPR4, and binary codes of 1 and 0 (or more generally +a and −a) are made into septenary outputs of +3, +2, +1, 0, −1, −2 and −3 (or +3c, +2c, +c, 0, −c, −2c and −3c).
Thus, binary codes are converted into ternary, quinary or septenary signals in any magnetic recording channel. Viterbi decoding is performed so as to generate binary codes of 1 and 0 from such a sequence of ternary, quinary or septenary signals.
Viterbi decoding can be represented as a desired finite state machine having N states (N is the m−
th
power of 2 when the memory length of an encoder for convolutional codes is m). The form of a two-dimensional graph in which the (N) states of this finite state machine at a certain time k are expressed by nodes arranged vertically, and transitions from respective states to respective state at time (k+1) are represented as branches, is referred to as a trellis diagram.
Viterbi decoding is used for detecting the shortest path on the trellis diagram, and it is regarded as equivalent to a dynamic programming problem for a multistage decision process. A Viterbi decoder is used for maximum likelihood estimation of a transmission sequence in a channel having a band limit with inter-symbol interference. That is, of possible data symbol sequences, a data symbol sequence which can minimize a distance metric (distance function) for a received data symbol sequence, such as the total sum of square errors in the received data symbol sequence, or the like, is selected.
A data symbol for limiting the run length of “0” corresponding to silence has been conventionally used for recovering timing from read-back signals. Particularly, a rate 8/9 (0, 4/4) code, or a rate 16/17 (0, 6/6) code disclosed in U.S. Pat. No. 5,717,395 has been generally used as an RLL (Run Length Limited) (0, G/I) code suitable to the PR4 system and subject to an interleaving process. Here, G designates a global run length, and I designates a run length when interleaving is given to an even bit string and an odd bit string.
Signal processing systems are in the process of changing from PR4 systems to EPR4 systems in accordance with increase of the half-width (PW50/T) of waveform caused by the desire for high recording density. Recently, EEPR4 systems which are further extended EPR4 systems have come under consideration. According to the EPR4 systems, S/N gain of about 3.0 dB can be obtained in comparison with the PR4 systems. On the other hand, it is known that S/N gain cannot be obtained in EEPR4 systems if recording density is not so high, because the correlation with noise is increased by equalization.
The performance of Viterbi decoding systems is dominated by Euclidian distance between noiseless data symbol sequences. The distance between data symbols can be expanded by eliminating data symbols corresponding to dominant decoding error events from the data symbol sequences. However, the data decoding performance is dominated by the difference between the distance between data symbols and the loss caused by the reduction of the data encoding rate.
As for the system for expanding the distance between data symbols, a great amount of research is being directed to MTR (Maximum Transition Run) codes which can be expected to improve the performance on a large scale in cooperation with the EEPRML system. MTR codes restrict the number of consecutive magnetic transitions to thereby expand the minimum Euclidian distance between data symbols, and hence reduce the decoding error rate. To expand the Euclidian distance corresponds to cutting of a path which is not in existence as a symbol on the trellis diagram for Viterbi decoding. Therefore, the expansion of the Euclidian distance is more effective if the bit length taken account of in path selection is made longer. This is the reason why the effect of the MTR codes becomes conspicuous in the EEPRML system.
However, poor rate in data encoding is a drawback of the MTR codes. There has been proposed an MTR code overcoming this drawback and having a high rate of data encoding. As for an MTR code which restricts the number of consecutive magnetic transitions to at most two, a rate 6/7 MTR code by Brickner et al. is known. When an MTR code is used in the EEPRML system, the minimum Euclidian distance is expanded from 6 to 10, so that a coding gain of 2.2 dB can be obtained theoretically. Therefore, even if at most three consecutive magnetic transitions is allowed, similar improvement of the data decoding error rate can be expected with data symbols being arranged so that the minimum Euclidian distance is 10 on the trellis diagram of the EEPRML system. Such Generalized MTR codes have been proposed. As for the GMTR codes, known is a rate 8/9 GMTR code by Bliss, or a rate 9/10 GMTR code described in K. K. Fitzpatrick and C. S. Modlin, “Time-Varrying MTR Codes for High Density Magnetic Recording”, Proc. of GLOBECOM 97, pp. 1250-1253, 1997. GMTR has the maximum data encoding rate (Shannon Capacity) C=0.925, and there remains a problem that there is no code the data encoding rate of which is beyond 12/13. The present invention relates to a code the data encoding rate of which is 16/17, so that the length of any independent error can be limited to 4 bits or less, by using the characteristic of MTR codes which can restrict the pattern of error events.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a recording code in which the inter-symbol distance is large, the data encoding rate is high, and the number of consecutive 0 bits (run length) is short, and hence to provide a recording system
Hirai Tatsuya
Ide Hiroshi
Mita Seiichi
Nara Takashi
Nishiya Takushi
Hitachi , Ltd.
Jean-Pierre Peguy
Mattingly Stanger & Malur, P.C.
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