Data detector and data detection method which measure and...

Details Data detector and data detection method which measure and... Data detector and data detection method which measure and...

1998-06-19

2001-07-24

Chin, Stephen (Department: 2734)

Pulse or digital communications

Systems using alternating or pulsating current

Plural channels for transmission of a single pulse train

C375S341000, C714S794000

Reexamination Certificate

active

06266378

ABSTRACT:

The following disclosure is based on Korean Patent Application No. 97-39945 filed on Aug. 21, 1997, the disclosure of which is incorporated hereby into this application by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to data detection and, more particularly, to a data detector for improving performance in maximum likelihood detection, and a method therefor.
2. Description of the Related Art
Signal processing technology relating to partial response maximum likelihood (PRML) decoding, including a Viterbi decoding process, has been applied to increase recording density without drastically changing the characteristics of the conventional recording/reproducing apparatuses themselves. Many devices for implementing such technology have been suggested.
FIG. 1
is a block diagram showing the recording/reproducing unit of a digital videocassette recorder (VCR) having a partial response (PR)
4
(+1,0,−1) type. In
FIG. 1
, input data to be recorded is modulated by a precoder
102
. That is, the output of an adder
104
of the precoder
102
is delayed by a time corresponding to 2 bits of the input data, by two unit delays (D)
106
and
108
, and then fed back to the adder
104
. The adder
104
performs an exclusive OR operation on the input data and the feedback data. Such operation of the precoder
102
converts the input data into interleaved non-return to zero inversion (NRZI) data. Here, D represents a unit delay corresponding to 1 bit of the input data.
A recording amplifier
110
of a driven-by-current type carries enough current through a recording head HD
1
of a channel
112
such that data is recorded on a recording medium T in an optimal state. A signal reproduced by a reproducing head HD
2
of the channel
112
is amplified to a desired amplitude by a playback amplifier
114
. An equalizer
116
compensates for distortion in the waveform and amplitude of the reproduced signal. The compensation involves removing a DC component and transmitting only a high frequency component which indicates transition of record data as a differential type pulse, due to a differential characteristic of the channel
112
. Here, the reproduced signal output from the playback amplifier
114
after being amplified is a PR(+1,−1) type signal.
The differential type channel characteristic means (1−D). A channel demodulator
118
having a (1+D) integral characteristic converts the PR(+1,−1) type signal output from the equalizer
116
into a PR
4
(+1,0,−1) type signal, so that the signal modulated by the precoder
102
of the recorder is demodulated into the original record data. Here, the channel demodulator
118
includes a delay
120
for delaying the output of the equalizer
116
by a unit bit (1 bit), and an adder
122
for adding a signal delayed by the delay
120
to the output of the equalizer
116
. A clock generator
124
detects the timing of the reproduced signal equalized by the equalizer
116
using an internal phase locked loop (PLL) circuit to generate the clock signal required for a data detector
126
.
The data detector
126
includes an analog-to-digital converter (ADC)
128
and a digital Viterbi decoder
130
. The ADC
128
converts the output of the channel demodulator
118
into digital data according to a sampling clock signal generated by the clock generator
124
, and the digital Viterbi decoder
130
decodes the digital data using a Viterbi decoding algorithm, which is a maximum likelihood decoding algorithm, according to a driving clock signal generated by the clock generator
124
. Since a sampling point of the ADC
128
corresponds to a detection point for the reproduced data, the sampling point is a critical factor determining the performance of the digital Viterbi decoder
130
. However, the conventional data detector
126
shown in
FIG. 1
cannot process a continuously varying signal, so a phase error occurs between the sampling point and the actual optimal detection point. As a result, Viterbi decoding performance is lowered.
SUMMARY OF THE INVENTION
To solve the above problems, it is an object of the present invention to provide a data detector which adaptively matches the phase of sampling points of an input signal, as data detection points, with the phase of optimal detection points of an actual reproduced signal, while maximum likelihood decoding is performed on reproduced data.
It is another object of the present invention to provide a data detection method for adaptively matching the phase of sampling points of an input signal, as data detection points, with the phase of optimal detection points of an actual reproduced signal, while maximum likelihood decoding is performed on reproduced data.
To achieve the first object, there is provided a data detector comprising a converter, a maximum likelihood decoder and a generator. The converter converts received data into digital data according to a sampling clock signal, and the maximum likelihood decoder performs maximum likelihood decoding on the digital data. The generator measures a phase difference between the digital data sampled at a desired detection point among a predetermined number of optimal detection points of the received signal and each of a number of reference levels according to the predetermined number of optimal detection points. It also generates a control signal for changing the phase of the sampling clock signal according to the measured phase difference. Preferably, the data detector of the present invention further comprises a phase shifter for shifting the phase of the sampling clock signal according to the control signal.
To achieve the second object, there is provided a data detection method comprising the steps of: (a) converting a received signal into digital data according to a sampling clock signal; (b) performing maximum likelihood decoding on the digital data; and (c) measuring a phase difference between the digital data sampled at a desired detection point among a predetermined number of optimal detection points of the received signal and each of a number of reference levels according to the predetermined number of optimal detection points, and generating a control signal for changing the phase of the sampling clock signal according to the measured phase difference. Preferably, the data detection method of the present invention further comprises the step (d) of shifting the phase of the sampling clock signal according to the control signal and feeding back a shifted clock signal to the step (a).


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R.D. Cidecyan et al.: “A PRML System for Digital Magnetic Recording” IEEE Journal on Selected Areas in Communications, vol. 10, No. 1, Jan. 1992, pp. 38-56, XP000457625.

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