Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
1999-11-29
2002-10-22
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
Reexamination Certificate
active
06470473
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a data decoding processing system and method, and more specifically to a data decoding processing system and method for decoding a digital video signal with a shortened processing time.
When a digital video signal is stored in a DVD-ROM (digital video disk—read only memory), an encoding of data for DVD-ROM (generation of a physical sector from a logic sector) is conventionally performed by a procedure in that (1) an error detecting code (EDC) is added; (2) a main data is scrambled; and (3) an error correcting code (ECC) is added as a PO (parity of outer code) series and a PI (parity of inner code) series. Accordingly, in a data decoding system, a procedure reverse to the encoding is performed. Namely, (1) syndromes of the PI series and the PO series are calculated for error correction; (2) a descrambling is performed for the main data; and (3) the EDC checking is performed.
Referring to
FIG. 1
, there is shown a prior art data decoding processing system for carrying out the above mentioned processing. However, before explaining the system, a format of data stored in the DVD-ROM (disk) will be described with reference to
FIGS. 2A and 2B
. As shown in
FIG. 2A
illustrating a data format of one sector after scrambled, one sector is composed of 12 lines (172 bytes per line) and includes a scrambled main data of 2048 bytes, which is added at a heading with ID of 4 bytes and others and at an ending with EDC of 4 bytes. As shown in
FIG. 2B
, one ECC block includes 16 data sectors, PO error correcting codes (16 lines) added to the 16 data sectors in a column direction designated by the encircled reference number
1
, and PI error correcting codes (10 bytes) added to the 16 data sectors and the PO error correcting codes of 16 lines, in a row direction designated by the encircled reference number
2
.
Returning to
FIG. 1
, the shown DVD-ROM data decoding processing system, designated with the reference number
10
, includes a DVD-ROM reproducing unit
11
and a buffer memory
12
. In the DVD-ROM reproducing unit
11
, a demodulator
16
receives data read out from a disk
14
to demodulate the received data and to develop the demodulated data in the buffer memory, as shown by the encircled reference number
1
. A syndrome generator
18
read out data from the buffer memory
12
as shown by the encircled reference number
2
, and generates syndromes. On the basis of the generated syndromes, an error correcting circuit
20
performs an error correction to the data in the buffer memory
12
, as shown by the encircled reference number
3
. A descrambling/EDC checking circuit
22
reads out the error corrected data from the buffer memory
12
, as shown by the encircled reference number
4
, and performs the descrambling processing and the EDC checking to write the descrambled data into the buffer memory
12
, as shown by the encircled reference number
5
. Thus, the decoding is completed. A CPU (central processing unit)
24
controls an operation of the above mentioned various parts, and receives the result of the EDC checking to recognize the completion of the decoding.
Thereafter, a host computer (not shown) reads out necessary data from the buffer memory
12
.
In the above mentioned prior art DVD-ROM data decoding processing system, when the syndromes are generated, and when the descrambling processing and the EDC checking are executed, all of the data of one block are read out from the buffer memory, and therefore, the number of accesses to the buffer memory inevitably becomes large. As a result, a scrabble for an access authority occurs between the DVD-ROM reproducing unit and another processing which needs to access the buffer memory (for example, transfering to a host interface). This scrabble becomes a bottleneck so that a high speed processing of the overall system is hindered. Furthermore, since the number of accesses to the buffer memory is large, the processing time for the data decoding becomes long.
In order to reduce the number of accesses to the buffer memory, Japanese Patent Application Pre-examination Publication No JP-A-09-265730, (an English abstract of JP-A-09-265730 is available from the Japanese Patent Office and the content of the English abstract of JP-A-09-265730 is incorporated by reference in its entirety into this application) proposes to transfer data into an internal buffer memory once, and to access to the internal buffer memory. However, if this proposal is adopted, since the DVD-ROM data decoding processing system requires a memory having a memory capacity of one block (32 Kbytes), a circuit scale inevitably becomes large.
Furthermore, Japanese Patent Application Pre-examination Publication No. JP-A-10-126279, (an English abstract of JP-A-10-126279 is available from the Japanese Patent Office and the content of the English abstract of JP-A-10-126279 is incorporated by reference in its entirety into this application) proposes to supply the data read out from the buffer memory, to a syndrome calculator, and to simultaneously supply the read-out data to a descrambler so that an error correction is performed for the descrambled data, whereby the number of accesses to the buffer memory is reduced. In this proposed technology, however, when the correction is performed a plurality of times, it becomes necessary to access the buffer memory at each time the correction is performed. Accordingly, in a reproducing method needing the correction of plural times, the number of accesses to the buffer memory is still not reduced.
BRIEF SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a data decoding processing system and method which has overcome the above mentioned defect of the conventional one.
Another object of the present invention is to provide a data decoding processing system and method, capable of reducing the number of accesses to the buffer memory when the correction is performed a plurality of times, thereby to shorten the data decoding processing time.
The error correction requires the processing of two steps which includes (1) the step of generating the syndromes and (2) the step of seeking the position and the magnitude of an error(s) from the generated syndromes to perform the correction processing. According to the DVD-ROM format, the error correction in the decoding processing is performed for the data before descrambled. Here, the scrambling/descrambling is that a scramble data is added to each data by means of an exclusive-OR. In addition, the scrambling processing is unambiguously determined by the position of the data, but does not depend upon the value of the data. Accordingly, the existence
onexistence of an error gives no influence on the descrambling. Therefore, the generation of the syndromes is required to be performed for the data before descrambled, however, the result of the error correction is the same, independently of whether the error correction is performed for the data before descrambled or for the data after descrambled.
As mentioned above, it is required that the syndromes are generated on the basis of the data before descrambled. If the error correction is performed only one time, it is unnecessary to store and revise the syndrome. When the error correction is repeated a plurality of times as in the DVD-ROM having two error correcting code series of the PI series and the PO series, the revision is required when the syndromes are stored and also when the error correction is performed. The reason for this is that, since the revised data in the buffer memory is the data after descrambled, the syndrome cannot be generated by reading out the data in the buffer memory.
Furthermore, the revision becomes necessary at each time the EDC calculation result is stored and the error is corrected. When all of the error correction is completed, it is possible to obtain the result of the EDC calculation for the data having no error.
The present invention was made on the basis of the above mentioned thought. According to the present invention, th
De'cady Albert
Harris Cynthia
NEC Corporation
Whitham Curtis & Christofferson, PC
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