Data counting memory card and reader

Details Data counting memory card and reader Data counting memory card and reader

1992-06-22

1994-02-08

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

235380, 235379, 235382, 235385, 235492, G06K 500, G06F 1530

Patent

active

052854159

ABSTRACT:
An integrated circuit for a passive unit counting memory card comprises p levels (10, 11, 12) of data counting memory. The levels contain corresponding numbers of cases n.sub.1 . . . n.sub.p, a write operation being achieved in a case of an upper rank level each time all the cases of the lower rank level have been enabled, the cases of the lower levels then being erased. The circuit comprises p-1 ghost levels (21, 22) identical to the p-1 upper rank levels of the p counting levels. The addressing logic of the ghost levels is such that the cases of ghost levels are addressed in write phase simultaneously with the cases of the corresponding counting levels and, after a write phase, are addressed in erase phase simultaneously with the cases of the levels of lower rank than the one that has just been enabled.

REFERENCES:
patent: 4256955 (1981-03-01), Giraud et al.
patent: 4367402 (1983-01-01), Giraud et al.
patent: 4853526 (1989-08-01), Effing
patent: 5033021 (1991-07-01), Barakat
patent: 5089959 (1992-02-01), Hazard
European Search Report.

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