Data compression read mode for memory testing

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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Details

C365S189050, C365S189070, C365S189080, C714S719000, C714S718000, C714S720000

Reexamination Certificate

active

11430550

ABSTRACT:
Memory devices having a normal mode of operation and a test mode of operation are useful in quality programs. The test mode of operation includes a data compression test mode. In the data compression test mode, reading one word of an output page provides an indication of the data values of the remaining words of the output page. The time necessary to read and verify a repeating test pattern can be reduced as only one word of each output page need be read to determine the ability of the memory device to accurately write and store data values. The memory devices include data compression circuits to compare data values for each bit location of each word of the output page. Output is selectively disabled if a bit location for one word of the output page has a data value differing from any remaining word of the output page.

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