Data communication for memory

Static information storage and retrieval – Read/write circuit – Signals

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Details

36518908, 36518911, G11C 700

Patent

active

057242887

ABSTRACT:
A memory circuit is described which includes memory cells for storing data. The memory circuit can be read from or written to by an external system such as a microprocessor or core logic chip set. The microprocessor provides memory cell address data to the memory circuit and can request that data be output on communication lines for reading therefrom. The memory circuit reduces the time needed to read data stored in the memory by providing a valid output data signal. The valid output data signal indicates that data coupled to the communication lines has stabilized and is therefore valid. Different valid output data signals and trigger circuits for producing the signals are described.

REFERENCES:
patent: 4879693 (1989-11-01), Ferrant
patent: 5015883 (1991-05-01), Waller
patent: 5325330 (1994-06-01), Morgan
patent: 5349566 (1994-09-01), Merritt et al.
patent: 5424983 (1995-06-01), Wojcicki et al.
patent: 5434823 (1995-07-01), Howard
"DRAM 1 Meg .times. 4 DRAM 5VEDO Page Mode", 1995 DRAM Data Book, pp. 1-1 thru 1-30, Micron Technology, Inc.

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