Data communication for memory

Static information storage and retrieval – Read/write circuit – Signals

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Details

36518908, 36518911, G11C 700

Patent

active

059869488

ABSTRACT:
A memory circuit is described which has an output data strobe signal that indicates when valid data is available on the output lines. Several alternate signals and circuits are described which can be used for the output strobe signal. An echo clock signal is described which selectively follows an input clock signal in a synchronous memory system and indicated when valid output data is available. The output strobe signal is used to speed the reading of data from the output line by allowing a microprocessor, or other external circuit, to read the data from the output lines as soon as it is valid, thereby eliminating the need to wait a specified period of time.

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"DRAM 2MEG x 8DRAM 3.3v, EDO Page Mode", Micron Technology Inc., 1995 DRAM Data Book, 1-63 to 1-76, (1995).

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