Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2000-08-09
2004-04-20
Kim, Matthew (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C711S103000, C711S165000, C365S185330, C365S185040
Reexamination Certificate
active
06725351
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to data management in a data communication device such as a PHS (Personal Handyphone System).
2. Description of the Related Art
FIG. 2
shows the construction of the main components of a typical data communication device
1
. The data communication device
1
includes an antenna
2
, a radio frequency unit (RFU)
3
, a baseband IC (BBIC)
4
, a CPU (Central Processing Unit)
5
, a RAM (Random Access Memory)
6
, a flash memory
7
, an EEPROM (Electrically Erasable Programmable Read-Only Memory)
8
, and a DTE I/F (Data Terminal Equipment Interface)
9
.
When the antenna
2
receives a signal, the data communication device
1
causes the RFU
3
and the BBIC
4
to extract various predetermined information (data) from the received signal and output the data to the CPU
5
. The CPU
5
performs various functions based on the information.
When the data communication device
1
transmits information, the CPU
5
outputs the desired information to the BBIC
4
. The BBIC
4
and the RFU
3
cause the information to be carried on a transmission signal and then to be transmitted from the antenna
2
.
As shown in
FIG. 2
, the data communication device
1
is provided with three types of storage devices, namely RAM
6
, flash memory
7
, and an EEPROM
8
. When necessary, the CPU
5
controls these storage devices so as to write information to such storage devices or read information therefrom.
The flash memory
7
is a nonvolatile storage device which allows information to be retained even while power is not applied. The flash memory
7
is basically divided into a program storage region
7
a
for storing a communication program and the like for the data communication device
1
therein and a data storage region
7
b
for storing information (data) therein. The data storage region
7
b
is divided into a plurality of sectors
10
,
10
a
, each of which can store at least one piece of information therein.
The EEPROM
8
is a nonvolatile storage unit in which a buffer
11
is formed. The buffer
11
is used, for example, for sequentially storing predetermined information (buffer storage information) such as the result of computations which are continuously made in accordance with operation of the CPU
5
.
FIG. 3
shows an example configuration of the buffer
11
. As shown in
FIG. 3
, a plurality of storage units R is formed in the buffer
11
by sectioning the buffer
11
. Each storage unit R contains one piece of information. The order of storage of buffer storage information in each storage unit R is predetermined. For example, when buffer storage information Data
1
occurs in accordance with the operation of the CPU
5
or the like, the buffer storage information Data
1
is stored in a first storage unit R
1
. When buffer storage information Data
2
occurs, the buffer storage information Data
2
is stored in a storage unit R
2
, which is next to the unit R
1
. When buffer storage information Data
3
occurs, the buffer storage information Data
3
is stored in a storage unit R
3
, which is next to the unit R
2
.
Thus, the buffer storage information Data
1
, Data
2
, Data
3
, etc. are sequentially stored in the storage units R
1
, R
2
, R
3
, etc., respectively, in accordance with order of occurrence of the buffer storage information Data. Finally, a storage unit
31
,
643
stores buffer storage information DataN therein. Storage unit
31
,
643
is the last storage unit in the buffer
11
. When storage of another buffer storage information is required, storage occurs in the first storage unit R
1
again. In the above-described manner, subsequent buffer storage information is stored in the storage units R
2
, R
3
, etc. in accordance with the order of occurrence of the information. When buffer storage information is stored in a storage unit R which already contains information, the storing operation is hereinafter referred to as an updating operation.
As described above, the buffer
11
is provided in the EEPROM
8
. However, in order to achieve faster processing as well as to hold information stored in the buffer even while the power is off, the buffer
11
can be provided in the flash memory
7
.
When the buffer
11
is provided in the flash memory
7
, one sector
10
a
among a plurality of sectors
10
in the flash memory
7
serves as the buffer
11
. However, the following problems can arise.
Since a characteristic feature of the flash memory
7
is that information is deleted only sector by sector, it is impossible to delete one piece of information among a plurality of pieces of information stored in the buffer, i.e., in the sector
10
a
. Accordingly, when the buffer
11
is provided in the flash memory
7
, information already stored in the storage unit R of the buffer
11
is updated with newly occurring buffer storage information in accordance with the following procedure.
For example, assume that the CPU
5
causes the storage unit R
2
to update (replace) the buffer storage information Data
2
therein with new buffer storage information DataW. Initially, the CPU
5
reads all information stored in the buffer
11
and writes it in the RAM
6
(duplication).
After all information is duplicated from the buffer
11
to the RAM
6
, the information stored in the buffer
11
of the flash memory
7
is deleted. Since the information stored in the RAM
6
can be deleted or modified piece by piece (not sector by sector), the information Data
2
is replaced by the buffer storage information DataW in RAM
6
. Subsequently, the modified duplicated information of the buffer
11
is read from the RAM
6
and is stored in the currently empty buffer
11
.
Thus, the updating operation of the duplicated information in the buffer
11
is completed.
As described above, when the buffer storage information is updated in the buffer
11
, all information stored in the buffer
11
must be deleted. Deletion of the information stored in the buffer
11
(the sector
10
a
) requires approximately one second. Furthermore, while the information is being deleted, no other processing (in other words, no other tasks) can be performed, because the deletion of the information in the buffer
11
cannot be interrupted. This means that when the buffer
11
is provided in the flash memory
7
, the information deleting operation of the buffer
11
cannot be performed, and therefore the buffer storage information stored in the buffer
11
cannot be updated, while the data communication device
1
is communicating.
Due to this problem, it has up to now been impractical to provide the buffer
11
in the flash memory
7
.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a communication device in which a buffer is formed in a nonvolatile storage device such as a flash memory in order to achieve faster information processing.
To this end, according to one aspect of the invention, a data communication device may comprise:
a flash memory;
a primary buffer region provided in the flash memory and having a plurality of pieces of information stored therein time-sequentially from an earliest piece of information to a latest piece of information;
an auxiliary buffer region provided in the flash memory for receiving and storing pieces of primary-buffer storage information to be stored in the primary buffer region in the auxiliary buffer region during a first condition of the data communication device when the information stored in the primary buffer region is not allowed to be updated; and
an information-storage control unit for, when the primary-buffer storage information is stored in the auxiliary buffer region and during a second condition of the data communication device when updating of the information in the primary buffer region is allowed, reading information having a size not more than the storage capacity of the primary buffer region from the primary buffer region and the auxiliary buffer region, and re-storing the information that has thus been read in the primary buffer region.
According to t
Anderson Matthew D.
Keating & Bennett LLP
Kim Matthew
Murata Manufacturing Co. Ltd.
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