Data/clock recovery circuit for recovering data and clock...

Details Data/clock recovery circuit for recovering data and clock... Data/clock recovery circuit for recovering data and clock...

2006-10-10

2006-10-10

Burd, Kevin (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S326000, C375S327000, C375S360000

Reexamination Certificate

active

07120216

ABSTRACT:
A data/clock recovery circuit can recover high-rate data using the data as a clock signal. It includes an edge detector, a clock selection signal generating circuit, a clock selection circuit and a synchronizing circuit. The edge detector generates edge position information using a receiver output as a clock signal. The clock selection signal generating circuit generates a clock selection signal in response to the edge position information using the receiver output as the clock signal. The clock selection circuit selects a recovered clock signal from a clock signal group in response to the clock selection signal. The synchronizing circuit synchronizes the receiver output using the recovered clock signal, and outputs it as a synchronized data signal.

REFERENCES:
patent: 6137850 (2000-10-01), Miller
patent: 6310895 (2001-10-01), Lundh et al.
patent: 6751745 (2004-06-01), Yoshimura et al.
patent: 6760389 (2004-07-01), Mukherjee et al.
patent: 2003/0102928 (2003-06-01), d'Haene et al.
patent: 2000-357964 (2000-12-01), None
Dao-Long Chen, “A Power and Area Efficient CMOS Clock/Data Recovery Circuit for High-Speed Serial Interfaces”, IEEE Journal of Solid-State Circuits, vol. 31, No. 8, Aug. 1996, pp. 1170-1176.

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