Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2005-12-06
2005-12-06
Auve, Glenn A. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S311000
Reexamination Certificate
active
06973528
ABSTRACT:
To prevent data performance impacts when dealing with target devices that can only transfer data for a limited number of bytes before disconnecting, the invention implements a short term data cache on the bridge. Using this feature, the bridge will cache additional data beyond a predetermined quantity of data following a disconnect with the requesting device. As such, the bridge may continue to prefetch additional data up to an amount specified by a prefetch read byte count and return the additional data should the requesting device request additional data resuming at the point of disconnect. However, the bridge will discard the additional data when at least one of the following occurs: a) the requesting device disconnects data transfer, and b) a further READ request that resumes at the point of disconnect is not received within a predetermined time.
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Bronson Timothy C.
Gilda Glenn D.
Sheplock John M.
Williams Phillip G.
Auve Glenn A.
Hoffman Warnick & D'Alessandro LLC
International Business Machines - Corporation
Schiesser William E.
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