Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-07-26
2005-07-26
Peikari, B. James (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S134000, C711S133000, C711S135000
Reexamination Certificate
active
06922754
ABSTRACT:
A method and system directed to reducing the bottleneck to storage. In one aspect of the invention, a data-aware data flow manager is inserted between storage and a process or device requesting access to the storage. The data-aware data flow manager determines which data to cache and which data to pipe directly through. Through intelligent management and caching of data flow, the data-aware data flow manager is able to avoiding some of the latencies associated with caches that front storage devices. The data-aware data flow manager may determine whether to cache data or pipe it directly through based on many factors including type of data requested, state of cache, and user or system policies.
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Kahle Steven H.
Liu Wei
inFabric Technologies, Inc.
Jardine John S.
Peikari B. James
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