Data alignment system for a hardware accelerated command interpr

Details Data alignment system for a hardware accelerated command interpr Data alignment system for a hardware accelerated command interpr

1998-08-07

2000-11-07

Etienne, Ario

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output command process

710 33, 710 54, 710 65, 711201, G06F 300

Patent

active

061450170

ABSTRACT:
A hardware accelerated data alignment system in a hardware accelerated I/O data processing engine that gathers and maintains pointers to a set of widely distributed source and/or destination data locations. Non-aligned input data and output data from source and/or destination data locations are transparently input and output as contiguous streams of data in a zero wait-state manner according to data byte and/or data block boundaries dictated by the data processing engine regardless of the number of source data blocks and/or destination data blocks and the absence of any previously existing data byte and/or data block alignment.

REFERENCES:
patent: 5128969 (1992-07-01), Baghdady
patent: 5168561 (1992-12-01), Vo
patent: 5206821 (1993-04-01), Young et al.
patent: 5680642 (1997-10-01), Johnson
patent: 5884057 (1999-03-01), Blomgren et al.

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