Electrical computers and digital data processing systems: input/ – Input/output data processing – Transfer direction selection
Reexamination Certificate
2006-11-28
2006-11-28
Peyton, Tammara (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Transfer direction selection
C710S020000, C710S033000, C710S035000, C365S052000, C365S063000, C365S193000, C365S233100, C711S005000, C711S157000, C711S173000
Reexamination Certificate
active
07143207
ABSTRACT:
Memory apparatus and methods accumulate data between a data path and a memory device. A memory agent may have a data accumulator between a redrive circuit and a memory device or interface. The data accumulator may accumulate data to or from the redrive circuit. Other embodiments are described and claimed.
REFERENCES:
patent: 5005149 (1991-04-01), Elleaume et al.
patent: 5532757 (1996-07-01), Miyazaki et al.
patent: 5742840 (1998-04-01), Hansen et al.
patent: 5748872 (1998-05-01), Norman
patent: 5860080 (1999-01-01), James et al.
patent: 5867422 (1999-02-01), John
patent: 5898863 (1999-04-01), Ofer et al.
patent: 6006318 (1999-12-01), Hansen et al.
patent: 6034878 (2000-03-01), Osaka et al.
patent: 6038682 (2000-03-01), Norman
patent: 6092229 (2000-07-01), Boyle et al.
patent: 6125419 (2000-09-01), Umemura et al.
patent: 6128750 (2000-10-01), Espy et al.
patent: 6151648 (2000-11-01), Haq
patent: 6154826 (2000-11-01), Wulf et al.
patent: 6154855 (2000-11-01), Norman
patent: 6160423 (2000-12-01), Haq
patent: 6185644 (2001-02-01), Farmwald et al.
patent: 6255859 (2001-07-01), Haq
patent: 6263413 (2001-07-01), Motomura et al.
patent: 6317352 (2001-11-01), Halbert et al.
patent: 6327205 (2001-12-01), Haq
patent: 6345321 (2002-02-01), Litaize et al.
patent: 6369605 (2002-04-01), Bonella et al.
patent: 6408402 (2002-06-01), Norman
patent: 6449213 (2002-09-01), Dodd et al.
patent: 6487102 (2002-11-01), Halbert et al.
patent: 6493250 (2002-12-01), Halbert et al.
patent: 6502161 (2002-12-01), Perego et al.
patent: 6513080 (2003-01-01), Haq
patent: 6625687 (2003-09-01), Halbert et al.
patent: 6643752 (2003-11-01), Donnelly et al.
patent: 6658509 (2003-12-01), Bonella et al.
patent: 2002/0083255 (2002-06-01), Greeff et al.
patent: 360181863 (1985-09-01), None
patent: WO 99/30240 (1999-06-01), None
patent: WO 99/41666 (1999-08-01), None
patent: WO 99/41667 (1999-08-01), None
U.S. Appl. No. 10/454,399, filed Jun. 3, 2003, Pete D. Vogt.
U.S. Appl. No. 10/454,400, filed Jun. 3, 2003, Pete D. Vogt and James W. Alexander.
U.S. Appl. No. 10/454,398, filed Jun. 3, 2003, Pete D. Vogt.
U.S. Appl. No. 10/456,206, filed Jun. 4, 2003, Pete D. Vogt.
U.S. Appl. No. 10/456,178, filed Jun. 4, 2003, Pete D. Vogt.
U.S. Appl. No. 10/456,174, filed Jun. 4, 2003, Pete D. Vogt.
U.S. Appl. No. 10/713,868, filed Nov. 14, 2003, Pete D. Vogt.
U.S. Appl. No. 10/714,026, filed Nov. 14, 2003, Pete D. Vogt.
U.S. Appl. No. 10/883,474, filed Jun. 30, 2004, Pete D. Vogt.
U.S. Appl. No. 10/882,999, filed Jun. 30, 2004, Pete D. Vogt.
U.S. Appl. No. 10/859,438, filed May 31, 2004, Pete D. Vogt.
U.S. Appl. No. 10/858,850, filed May 31, 2004, Pete D. Vogt.
U.S. Appl. No. 10/859,060, filed May 31, 2004, Pete D. Vogt.
The Institute of Electrical and Electronics Engineers, Inc.,IEEE Standard for Scalable Coherent Interface(SCI), May 23, 2001, 1-243 pp.
R. Ng (Sun Microsystems, Inc.),Fast Computer Memories, IEEE Spectrum, Oct. 1992, pp. 36-39.
R.H.W. Salters (Philips Research Laboratories),Fast DRAMs for Sharper TV, IEEE Spectrum, Oct. 1992, pp. 40-42.
F. Jones (United Memories, Inc.),A New Era of Fast Dynamic RAMs, IEEE Spectrum, Oct. 1992, pp. 43-49.
M. Farmwald and D. Mooring (Rambus, Inc.),A Fast Path to One Memory, IEEE Spectrum, Oct. 1992, pp. 50-51.
S. Gjessing (University of Oslo), D.B. Gustavson (Stanford Linear Accelerator Center), D.V. James and G. Stone (Apple Computer, Inc.) and H. Wigger (Hewlett-Packard Co.),A RAM Link for High Speed, IEEE Spectrum, Oct. 1992, pp. 52-53.
The Institute of Electrical and Electronics Engineers, Inc.,IEEE Standard for High-Bandwidth Memory Interface Based on Scalable Coherent Interface(SCI)Signaling Technology(RamLink), 1996, 1-91 pp.
International Search Report (PCT/US2004/037285), 3 pages, dated Jun. 10, 2005.
PCT Written Opinion of the International Searching Authority (PCT/US2004/037285), 5 pages.
Intel Corporation
Marger Johnson & McCollom PC
Peyton Tammara
LandOfFree
Data accumulation between data path having redrive circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Data accumulation between data path having redrive circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Data accumulation between data path having redrive circuit... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3658276