Data access method, channel adapter, and data access control...

Details Data access method, channel adapter, and data access control... Data access method, channel adapter, and data access control...

2011-04-05

2011-04-05

Nguyen, Hiep T (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

Reexamination Certificate

active

07921265

ABSTRACT:
In an LSI implemented by a DMA chip, a BCC check block performs BCC check of cache data each time the cache data is read. In response to a check result indicating whether or not the check is completed, a CM read block turns on a BCC check bit and a BCC error bit of a data-transfer-end notification. Further, an FCC check block performs FCC check of the cache data. In response to a check result indicating whether or not the check is completed, the CM read block turns on an FCC check bit and an FCC error bit of the data-transfer-end notification. When data transfer is finished, the CM read block sends the data-transfer-end notification to a CPU via a descriptor block.

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Japanese Office Action mailed Feb. 3, 2009 and issued in corresponding Japanese Patent Application 2007-030753.

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