Data access and address translation for retrieval of data...

Details Data access and address translation for retrieval of data... Data access and address translation for retrieval of data...

2007-07-03

2007-07-03

Lane, Jack A. (Department: 2185)

Electrical computers and digital processing systems: memory

Addressing combined with specific memory configuration or...

Addressing cache memories

C711S121000, C711S203000

Reexamination Certificate

active

10730748

ABSTRACT:
A low-latency storage memory system is built from multiple memory units such as high-density random access memory. Multiple access ports provide access to memory units and send the resultant data out interface ports. The memory units communicate with the access ports through an interconnected mesh to allow any access port to access any memory unit. An address virtualization mechanism using address translators allows any access port of the memory storage system to access requested data as abstract objects without regard for the physical memory unit that the data is located in, or the absolute memory addresses within that memory unit.

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NSE4256 Network Search Engine, NETLOGIC, Revision 2.0, pp. 1-44.

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