Damascene structure with integral etch stop layer

Details Damascene structure with integral etch stop layer Damascene structure with integral etch stop layer

2007-04-03

2007-04-03

Menz, Doug (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S750000

Reexamination Certificate

active

10484168

ABSTRACT:
This invention relates to a semiconductor structure for dual damascene processing and includes upper and lower low k dielectric layers formed in a stack when the upper surface of the lower layer has an integral etch stop layer formed by exposing the upper surfaces of the layer H2plasma without any prior anneal prior to the deposition of the upper layer.

REFERENCES:
patent: 6720247 (2004-04-01), Kirkpatrick et al.
patent: 6962869 (2005-11-01), Bao et al.
patent: 7001848 (2006-02-01), Smith et al.
patent: 2002/0055275 (2002-05-01), MacNeil
patent: 1 059 664 (2000-12-01), None
patent: 2 361 808 (2001-10-01), None
patent: WO 00/51174 (2000-08-01), None
patent: WO 01/01472 (2001-01-01), None

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