Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-11-14
2006-11-14
Lebentritt, Michael (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S694000, C438S625000, C438S626000, C438S627000, C438S629000, C438S631000, C438S634000, C438S636000, C438S637000, C438S638000
Reexamination Certificate
active
07135400
ABSTRACT:
A method for avoiding resist poisoning during a damascene process is disclosed. A semiconductor substrate is provided with a low-k dielectric layer (k≦2.9) thereon, a SiC layer over the low-k dielectric layer, and a blocking layer over the SiC layer. The blocking layer is used to prevent unpolymerized precursors diffused out from the low-k dielectric layer from contacting an overlying resist. A bottom anti-reflection coating (BARC) layer is formed on the blocking layer. A resist layer is formed on the BARC layer, the resist layer having an opening to expose a portion of the BARC layer. A damascene structure is formed in the low-k dielectric layer by etching the BARC layer, the blocking layer, the SiC layer, and the low-k dielectric layer through the opening.
REFERENCES:
patent: 6114259 (2000-09-01), Sukharev et al.
patent: 6294457 (2001-09-01), Liu
patent: 6642153 (2003-11-01), Chang et al.
Chen Jain-Hon
Lee Charlie C J
Lien Wen-Liang
Wu Chih-Ning
Hsu Winston
Lebentritt Michael
Lee Kyoung
United Microelectronics Corp.
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