Damascene method capable of avoiding copper extrusion

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S672000, C438S700000

Reexamination Certificate

active

07037825

ABSTRACT:
A method for avoiding copper extrusion during a damascene process is disclosed. A semiconductor wafer including a substrate with at least one copper conductive wire on the substrate is provided. A dielectric layer on the copper conductive wire is formed. A damascene structure having an opening exposing a portion of the copper conductive wire is formed using the dielectric layer. A degassing process to make gas escape from the dielectric layer is performed. A barrier layer on portions of the exposed surface of the copper conductive wire and the damascene structure of the dielectric layer is formed. A conductive layer on the barrier layer is formed.

REFERENCES:
patent: 6368967 (2002-04-01), Besser
patent: 6486059 (2002-11-01), Lee et al.
patent: 6551915 (2003-04-01), Lin et al.
patent: 6764940 (2004-07-01), Rozbicki et al.
patent: 2005/0054202 (2005-03-01), Pan et al.

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