Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
1998-09-25
2004-04-13
Tse, Young T. (Department: 2634)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C327S149000, C327S158000, C327S161000, C331S057000
Reexamination Certificate
active
06721379
ABSTRACT:
1. Field of the Invention
The present invention relates to communications network in general and, in particular, to circuit arrangements for generating signals for transmission on said communications network.
2. Prior Art
The use of circuit arrangements to generate signal waveforms is well known in the prior art. The signal waveforms can be used to transmit information on busses, communications media and/or control writing and/or reading information into/from memories. Usually, the signal waveforms are in the form of voltages.
Several design criteria have to be addressed in order to provide acceptable waveform generating circuits. For example, if the waveforms are to be used in transmitting information in a computer network, the transmission system, such as Local Area Network, etc., interconnecting the computers has to be addressed in order to design an acceptable waveform generating circuit. Usually, the characteristics, such as voltage waveforms electromagnetic emissions of the interconnecting network are set by standards. In order to be compliant, the designer is faced with the problem of adapting technologies to meet the standard requirements.
Another area of challenge is to minimize product cost. It is well recognized and understood that the low cost producer of quality products will have substantial advantages in the marketplace. One of the many ways of reducing cost is to integrate analog and digital circuits on the same substrate. The cost savings are even more substantial if the VLSI manufacturing process is friendly to the fabrication of both analog and digital devices.
Prior art approaches in developing waveform generating circuits heavily relied on magnetics or other analog techniques to provide desired wave shape. The magnetics are usually expensive and requires tuning. The net result is that the cost of the product is unnecessarily increased.
Even when the prior art uses on chip circuits, to generate a desired wave shape, the circuits usually have a high degree of analog contents and, as such, are not easily adapted to digital processes such as CMOS technology.
Examples of the prior art techniques and devices are set forth in the below listed patents.
U.S. Pat. No. 5,440,514 describes a memory with a write control delay locked loop for controlling a write cycle of the memory. The delay locked loop avoids the race condition by adjusting the write cycle time of the memory so that if one part of the write cycle timing is increased, all of the write timing margins are increased.
U.S. Pat. No. 5,563,526 describes a programmable mixed mode integrated circuit in which analog and digital circuits are provided on the same chip. The analog circuits are fabricated from traditional analog devices. Thus, it appears as if the chip could not be manufactured by a straightforward digital process.
U.S. Pat. No. 5,687,330 describes a driver circuit for a bus in which the rise and fall of the output signal from the driver circuit is controlled by a register external to the driver circuit.
Still other prior art patents relating to waveform generation includes U.S. Pat. Nos. 5,185,538; 5,440,515; 5,479,124 and 5,684,064. Even though the patents are believed to work well for their intended purposes, they do not address the problems discussed above or control wave shaping as tightly as it is controlled by the present invention.
For high speed (100 Mbps through gigabits) data transmissions, it is imperative that the waveform be tightly controlled or else the require data speed cannot be attained. Consequently, there is a need for a circuit arrangement that provides tightly controlled waveforms.
SUMMARY OF THE INVENTION
It is one object of the present invention to integrate waveform generating circuits with digital circuitry on the same chip.
It is another object to provide the integrated chip at a cost that is substantially lower than was heretofore been possible.
It is still another object of the present invention to generate transmitted waveforms having precise rise and fall times as specified by any one of the several standards such as ANSI, IEEE, ATM, etc.
The waveform generating system, according to the teachings of the present invention, uses clocked control of master and replica delay circuits to precisely control the rise and fall time of a transmit waveform. The transmit waveform may be produced by a series of sequential over sampled and switched current sources whose timing is precisely locked to replicas and a master delay lines. The accuracy of the rise time, etc., is “locked” to the accuracy of the basic time base or clock reference. As a consequence, the VLSI manufacturing process variations, power supply variations, and temperature variations which could create unwanted timing, signal rise time, fall time, or wave shape deviations are effectively nulled out.
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Cranford, Jr. Hayden Clay
Rizzo Raymond Paul
Cockburn Joscelyn G.
International Business Machines - Corporation
Tse Young T.
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