Cycling to mitigate imprint in ferroelectric memories

Details Cycling to mitigate imprint in ferroelectric memories Cycling to mitigate imprint in ferroelectric memories

2007-12-26

2010-06-01

Luu, Pho M (Department: 2824)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S189170, C365S200000

Reexamination Certificate

active

07729156

ABSTRACT:
The method includes storing a memory data state in the ferroelectric memory cell. An event will trigger the evaluation of signal margin on a memory cell. If the memory cell is identified to have a weak signal, the memory cell is exercised. Exercising includes either performing one or more data read/re-write events or performing one or more simulated data read and data write events of an alternating high data state and a low data state to the memory cell associated with the weak data bit. Both the lifetime retention testing and the memory data state exercising are performed in the background of normal memory operation.

REFERENCES:
patent: 5525528 (1996-06-01), Perino et al.
patent: 5953245 (1999-09-01), Nishimura
patent: 6069817 (2000-05-01), Shin et al.
patent: 2004/0190322 (2004-09-01), Baumann et al.

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