Cyclical image buffer

Computer graphics processing and selective visual display system – Computer graphics display memory system – Graphic display memory controller

Reexamination Certificate

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Details

C345S530000, C345S536000, C345S056000, C345S100000

Reexamination Certificate

active

07995067

ABSTRACT:
A storage buffer attached to an image processor for stereo image processing. The processor compares a first image and a second image. The storage buffer stores image data of the second image. The storage buffer includes: a data-shifting-hardware mechanism which while the processor compares a patch of the first image to a swath of the second image, the data shifting mechanism using hardware within the storage buffer shifts at least a portion of the swath within the storage buffer. The data-shifting hardware mechanism includes preferably digital multiplexers with respective selectable inputs from adjacent and non-adjacent columns of data within the storage buffer and selectable inputs from adjacent rows of data within the storage buffer.

REFERENCES:
patent: 4694405 (1987-09-01), Bradbury et al.
patent: 5131740 (1992-07-01), Maekawa
patent: 5224213 (1993-06-01), Dieffenderfer et al.
patent: 6337578 (2002-01-01), Jefferson et al.
patent: 7038689 (2006-05-01), Willis

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