Current sense amplifiers having equalization circuits therin...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

Reexamination Certificate

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C365S203000

Reexamination Certificate

active

06281713

ABSTRACT:

RELATED APPLICATION
This application is related to Korean Application No. 98-59420, filed Dec. 28, 1998, the disclosure of which is hereby incorporated herein by reference.
FIELD OF THE INVENTION
The present invention relates to integrated circuit devices, and more particularly to current sense amplifiers (CSA).
BACKGROUND OF THE INVENTION
Data stored in a memory cell may be read through a pair of differential input and output signal lines (e.g., an input and output signal line and a complementary input and output signal line) during a data reading operation. The voltage difference between the input and output line and the complementary input and output line may be very small during the reading operation. To sense the small voltage difference, a sense amplifier is frequency used.
There are two common types of sense amplifiers, voltage sense amplifiers (VSA) and current sense amplifiers (CSA). VSAs are used to sense voltage differences and CSAs are used to sense current differences. In general, a current sense amplifier is used when the load of a line connected to an input port of a sense amplifier is large. In a semiconductor memory device, when the capacity of the memory is large, the pair of input and output signal lines are typically long and the load is typically very large. Accordingly, current sense amplifiers are frequently used in connection with large semiconductor memory devices. Also, due to the fact that a current sense amplifier may have a faster sense speed than a voltage sense amplifier, current sense amplifiers are often used in semiconductor memory devices having small data storage capacitors.
Referring to
FIG. 1
, a circuit diagram of a conventional sense amplifier is illustrated. A current source
11
provides the same amount of current to a differential input signal line INPUT and a complimentary differential input signal line INPUTB during the activation state of an sense amplifier enable signal SAEN (e.g., logic high). At this time, when data is loaded on the differential input signal line INPUT and the complimentary differential input signal line INPUTB, a current difference is generated between INPUT and INPUTB according to the voltage difference between them. A differential current sensor
12
detects the current difference between the pair of differential input signal lines INPUT and INPUTB, converts the current difference into a voltage difference, and outputs the converted voltage difference to a differential output signal line OUTPUT and a complementary differential output signal line OUTPUTB. A current sink
14
lets some of the current from the pair of differential output signal lines OUTPUT and OUTPUTB flow to a ground port VSS during the activation state of the sense amplifier enable signal SAEN. An equalization device
13
electrically connects the pair of differential output signal lines OUTPUT and OUTPUTB and equalizes them when the sense amplifier enable signal SAEN is inactive and the current source is inactive.
The ratio of the voltage difference between the pair of differential output signal lines OUTPUT and OUTPUTB to the voltage difference between the pair of differential input signal lines INPUT and INPUTB (e.g., the degree of amplification) is called the gain. The gain is controlled by regulating the sizes of PMOS transistors P
13
and P
14
of the differential current sensor
12
and the sizes of NMOS diodes N
11
and N
12
of the current sink
14
. As the gain becomes larger, the sensing speed of the current sense amplifier becomes faster. However, when the gain gets too large, the signals on the pair of differential output signal lines OUTPUT and OUTPUTB may begin to oscillate, as illustrated by FIG.
8
. Such oscillations may cause the levels of OUTPUT and OUTPUTB to become switched, and therefore an incorrect data value may be produced during a reading operation.
If the gain of the current sense amplifier is large, the values of OUTPUT and OUTPUTB can oscillate when the power supply voltage VCC is high. The level of the maximum power supply voltage in which oscillation is not generated in the current sense amplifier is called the High-VCC margin. Therefore, in the current sense amplifier, the gain should be appropriately controlled by regulating the sizes of the PMOS transistors P
13
and P
14
and the sizes of the NMOS diodes N
11
and N
12
so that the High-VCC margin is high enough to prevent oscillation.
In the conventional current sense amplifier, the High-VCC margin is reduced when the gain is increased in order to make the sensing speed fast. Yet, when the gain is decreased in order to increase the High-VCC margin and reduce the likelihood of oscillations, the sensing speed decreases and the rate at which data can be read from a memory also decreases. Thus, notwithstanding the desired use of current sense amplifiers in large memory devices, there continues to be a need for improved current sense amplifiers that are less susceptible to parasitic oscillators during reading operations.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide improved current sense amplifiers.
It is another object of the present invention to provide current sense amplifiers having reduced susceptibility to sensing errors caused by output oscillations.
It is still another object of the present invention to provide current sense amplifiers having high-Vcc margin and high sensing speed.
These and other objects, advantages and features of the present invention may be provided by a current sense amplifier that comprises a pair of differential output signal lines and a current sensor electrically coupled to the pair of differential output signal lines. A first equalization device is also provided. The first equalization device is electrically coupled to the pair of differential output signal lines and is responsive to a sense amplifier enable signal (SAEN). In addition, according to a preferred aspect of the present invention, a second equalization device is also provided to reduce the likelihood that the differential outputs of the current sense amplifier will oscillate during sense and amplify operations. This second equalization device is also electrically coupled to the pair of differential output signal lines, however, the second equalization device is not responsive to the sense amplifier enable signal. Instead, the second equalization device is preferably responsive to a power supply signal (e.g., Vcc) and/or reference signal (e.g., Vss) and performs a constant or variable equalization function when the sense amplifier is active.
To provide a variable equalization function, the second equalization device preferably comprises a voltage divider having a reference node, and a pass transistor having source and drain regions electrically coupled to the pair of differential output signal lines and a gate electrode electrically coupled to the reference node. Here, the resistance provided by the pass transistor determines the degree to which the second equalization device acts to reduce oscillations at the output of the sense amplifier. This resistance may also be controlled by varying the potential of the reference node in the voltage divider. For example, if the voltage divider is connected between a power supply potential and a ground reference potential, an increase in the magnitude of the power supply potential may be used to increase the potential of the reference node and thereby decrease the resistance of the pass transistor.


REFERENCES:
patent: 4370737 (1983-01-01), Chan
patent: 5258959 (1993-11-01), Dallabora et al.
patent: 5553295 (1996-09-01), Pantelakis et al.
patent: 5615161 (1997-03-01), Mu
patent: 5953259 (1999-09-01), Yoon et al.
patent: 5959913 (1999-09-01), Raad
patent: 6072738 (2000-06-01), Brown
patent: 92-8756 (1992-05-01), None
patent: 92-20241 (1992-11-01), None

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