Current-regulated, voltage-regulated erase circuit for EEPROM me

Details Current-regulated, voltage-regulated erase circuit for EEPROM me Current-regulated, voltage-regulated erase circuit for EEPROM me

1988-06-29

1989-12-19

Gossage, Glenn A.

Static information storage and retrieval

Read/write circuit

Erase

365185, 36518911, 36518906, 36523006, 323311, 323316, G11C 700, G05F 316

Patent

active

048887382

ABSTRACT:
A control circuit for erasing EEPROM memory cells is disclosed, including a charge pump having two switched constant current sources driven by opposing clocks. Current produced by the current sources is coupled to a node from where it is used to erase EEPROM memory cells. A switch is provided to isolate the device being erased by floating its source.

REFERENCES:
patent: 4393481 (1983-07-01), Owen et al.
patent: 4405868 (1983-09-01), Lockwood
patent: 4733371 (1988-03-01), Terada et al.
patent: 4785423 (1988-11-01), Skupnjak et al.
patent: 4797856 (1989-01-01), Lee et al.

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