Current reduction circuit of semiconductor device

Static information storage and retrieval – Read/write circuit – Bad bit

Reexamination Certificate

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C365S195000

Reexamination Certificate

active

11275421

ABSTRACT:
A current reduction circuit of a semiconductor device is disclosed which includes an enabling signal generator which outputs a predetermined enabling signal in association with a cell block in which a bridge has been formed between a word line and a bit line, and an isolation controller which is enabled in response to the enabling signal, and outputs a control signal to periodically isolate the bridge-formed cell block from a sense amplifier array for a predetermined period in a standby mode in response to a periodic signal enabled at intervals of a predetermined time.

REFERENCES:
patent: 5970002 (1999-10-01), Yoo
patent: 6396754 (2002-05-01), Lee et al.
patent: 6850453 (2005-02-01), Park
patent: 6944076 (2005-09-01), Nakamura et al.
patent: 6946903 (2005-09-01), Marshall et al.
patent: 2006/0007753 (2006-01-01), Choi et al.

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