Current reduction circuit for testing purpose

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364490, 36518905, 371 221, 371 226, G11C 512

Patent

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055924948

ABSTRACT:
A detecting and testing circuit for detecting a leakage of current from LSI circuits mainly constituted by CMOS devices. The semiconductor integrated circuit includes a first circuit block having an output line in which a logic level responsive to an input signal is supplied through a ratio type or precharged type operation; and a first standby circuit for maintaining the first circuit block at a standby state, wherein a source of a current or electric charge is shut off from the output line on receipt of information by which the standby state is set, and respective logic levels corresponding to an arbitrary input signal is supplied to the output line of the first block circuit at a same potential level as a power supply.

REFERENCES:
patent: 5019772 (1991-05-01), Dreibelbis et al.
patent: 5051995 (1991-09-01), Tobita
patent: 5388077 (1995-02-01), Sanada

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