Current mode logic scheme and circuit for matchline sense...

Details Current mode logic scheme and circuit for matchline sense... Current mode logic scheme and circuit for matchline sense...

2006-12-12

2006-12-12

Kim, Matthew (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

C365S049130

Reexamination Certificate

active

07149845

ABSTRACT:
A CAM device features matchlines which are coupled in series between a top current source, a bottom current source, and ground. The top current source is configured to supply a first current to the matchline and the bottom current source, while the bottom current source is configured to supply a second current to ground. The magnitude of the first current is limited by the operation of the CAM cells coupled to the matchline, and is duplicated by a current mirror architecture. The mirrored of the first current, known as the sense current, is coupled to a measurement circuit to measure the state of the matchline. This architecture features lower power consumption and faster matchline evaluations.

REFERENCES:
patent: 5253197 (1993-10-01), Suzuki et al.
patent: 5267213 (1993-11-01), Sung et al.
patent: 6381163 (2002-04-01), Kurihara et al.
patent: 6442054 (2002-08-01), Evans et al.
patent: 6873531 (2005-03-01), Ahmed et al.

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