Current mode logic circuits employing IGFETS

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307452, 307453, 307465, H03K 19094

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active

052162958

ABSTRACT:
Counting and division circuits include an input differential stage connected to a cross-coupled differential stage. The input stage includes first and second IGFETS whose gate electrodes are respectively connected to first and second inputs, whose drains are respectively connected to first and second outputs, and whose sources are connected to the drain of a third IGFET whose source is grounded. The cross-coupled stage includes fourth and fifth IGFETs which are cross-coupled in that the gate of the fourth IGFET and the drain of the fifth IGFET are directly connected to the first output and the gate of the fifth IGFET and the drain of the fourth IGFET are directly connected to the second output. The sources of the fourth and fifth IGFETs are connected in common to the drain of a sixth IGFET whose source is grounded. Control signals are applied to the gates of the third and sixth IGFETS for selectively and alternately turning them on one at a time and, simultaneously, setting the level of the current flowing through the differentially connected IGFETS in their drain circuit.

REFERENCES:
patent: 4812676 (1989-03-01), Yang et al.
patent: 4825098 (1989-04-01), Aoyama
patent: 4858191 (1989-08-01), Higuchi et al.
Heimsch et al.; Merged CMOS/Bipolar Current Switch Logic(MCSL); Journal of Solid State Circuits, vol. 24, No. 5, Oct., 1989; p. 1307.
Hong-Ih Cong et al.; Multigigahertz CMOS Dual-Modulus Prescalar IC: Journal of Solid State Circuits, vol. 23, No. 5, Oct., 1988; p. 1189.

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