Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor
Patent
1999-01-04
2000-08-15
Tokar, Michael
Electronic digital logic circuitry
Function of and, or, nand, nor, or not
Field-effect transistor
326115, 326112, 326121, 326119, 326 83, 327 77, 327534, H03K 19094, H03K 190175, H03K 522
Patent
active
061042145
ABSTRACT:
A current mode logic circuit has a first and second NMOS transistors N1 and N2, an input terminal IN connected to both gates of the first and second NMOS transistors N1 and N2 to input data, a reference voltage input terminal REF, an output terminal OUT connected to a drain of the first NMOS transistor N1, and a current power source I connected both sources of the first and second NMOS transistors N1 and N2. Body terminals of the first and second NMOS transistors N1 and N2 are connected to the input terminal IN and the reference terminal REF, respectively so that the body voltage of each of the first and second NMOS transistors N1 and N2 is controlled.
REFERENCES:
patent: 5220212 (1993-06-01), Sinh
patent: 5247210 (1993-09-01), Swanson
patent: 5517134 (1996-05-01), Yaklin
patent: 5552723 (1996-09-01), Shigehara et al.
patent: 5821769 (1998-10-01), Douseki
"Analogue and Digital Hybrid LSI to Prevent Digital Noise Transfer," Nikkei Electronics, Dec. 26, 1988, pp. 199-202. (Statement of relevance attached.).
Hirano Yuuichi
Ueda Kimio
Wada Yoshiki
Cho James A.
Mitsubishi Denki & Kabushiki Kaisha
Tokar Michael
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