Current mode I/O for digital circuits

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

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Details

326 96, 326 86, H03K 1716, H03K 19175

Patent

active

058119841

ABSTRACT:
A digital input/output interface for use with two digital circuits connected by a transmission line having a characteristic impedance Z.sub.0 includes a current driver in one of the digital circuits and a current receiver in the other digital circuit. The current driver is configured to generate a current in the transmission line when a digital signal is applied to the current driver. The current receiver includes a current conversion element connected to the transmission line at an input node through an input impedance Z.sub.in and adapted to convert the current in the transmission line into an output voltage, and an active termination element configured to actively adjust the input impedance Z.sub.in to match the characteristic impedance Z.sub.0 of the transmission line. An impedance transforming receiver for use with a transmission line having a small characteristic impedance Z.sub.0 and carrying a relatively small current mode signal includes the following: an input element connected to the transmission line and configured to receive the small current mode signal, the input element having a small input impedance Z.sub.in that substantially matches the characteristic impedance of the transmission line; and a high impedance output element adapted to convert the small current mode signal into an output binary voltage having a noise margin large enough for digital communication.

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Kawahara et al., "Low-Power Chip Interconnection by Dynamic Termination", IEEE Journal of Solid-State Circuits, Sep. 1995, vol. 30, No. 9, pp. 1030-1031.
Kameyama et al., "Multiplier Chip with Multiple-Valued Bidirectional Current-Mode Logic Circuits", Computer, Apr. 1988, vol. 21, No. 4, pp. 43-56.

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