Current mode charge pumps

Details Current mode charge pumps Current mode charge pumps

1999-03-02

2001-03-27

Kim, Jung Ho (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

C363S060000

Reexamination Certificate

active

06208196

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the field of charge pumps.
2. Prior Art
Charge pumps are well known in the prior art for operating from a power supply of a first voltage for such purposes as providing a source of power at a second voltage higher than the first voltage (voltage multiplication), and/or providing a balanced (plus and minus) power supply from a single power supply (voltage inversion). Such charge pumps are often realized in integrated circuit form and the output thereof used for various purposes on that integrated circuit. By way of a specific example, the preferred embodiment of the present invention is intended for use in CMOS integrated circuits to provide an augmented dual supply to achieve rail-to-rail input and rail-to-rail output voltages for on chip integrated circuits.
A typical circuit for a prior art voltage mode charge pump may be seen in FIG.
1
. As shown in that Figure, fly capacitors C
1
and C
2
are driven by a clock signal CLK through inverters INV
1
, INV
2
and INV
3
. The inverters are shown schematically, in that the output of the inverters INV
1
and INV
2
are non-overlapping signals representing the inverted clock signal CLK and the non-inverted clock signal, respectively. When the output of inverter INV
1
is high and the output of inverter INV
2
is low, the charge on capacitor C
1
will drive the voltage on node
1
higher than the supply voltage V
DD
. This turns off n-channel transistor M
1
, and turns on n-channel transistor M
2
to charge capacitor C
2
to the power supply voltage V
DD
(the output of inverter INV
2
being low, typically at ground potential). At the same time node
1
, being driven higher than the power supply V
DD
, will hold p-channel device M
4
off. The low voltage on node
2
, however, will turn on p-channel device M
3
to couple the higher voltage at node
1
to the output V
OUT
, delivering charge to the reserve capacitor C
OUT
in an amount dependent upon the value of the output voltage V
OUT
, the current being drawn by the load connected to the output V
OUT
and the various other parameters of the charge pump.
When the output of the inverter INV
1
goes low and the output of inverter INV
2
goes high, the voltage on node
2
will now go higher than the supply voltage V
DD
because of the charge on capacitor C
2
, turning on n-channel transistor M
1
to recharge capacitor C
1
to the voltage V
DD
. The voltage on node
1
will turn on p-channel device M
4
to couple the higher voltage on node
2
to the output V
OUT
, delivering charge from fly capacitor C
2
to the reserve capacitor C
OUT
. Note that even if the voltage on node
1
is equal to V
DD
, as it would be when capacitor C
1
is fully charged, the voltage on node
2
when the output of inverter INV
2
is high, and the output voltage V
OUT
, will both be higher than the voltage V
DD
, SO that both the source and drain of p-channel device M
4
will be at higher voltages than the gate of the device. With no significant load on the output of the charge pump, the output voltage V
OUT
will stabilize at approximately 2 V
DD
.
In the foregoing circuit, the power consumption is not well controlled due to switching losses, namely the feed through current in inverters INV
1
, INV
2
and INV
3
. Also the excess current required to charge and discharge the capacitors due to the switching times.
BRIEF SUMMARY OF THE INVENTION
Current mode charge pumps having improved power consumption characteristics and reduced peak current requirements. The current mode charge pumps utilize a differential transistor pair with a current source providing the tail current for the differential pair. The differential pair alternately steers the current of the current source through first and second fly capacitors, with additional circuitry coupling the opposite fly capacitor, previously charged, to the output of the charge pump. Selection of the tail current provides for matching of circuit performance with the required charge pump output voltage, the load current to be provided thereby and the start time requirements. Various embodiments are disclosed.


REFERENCES:
patent: 4271461 (1981-06-01), Hoffmann et al.
patent: 4922128 (1990-05-01), Dhong et al.
patent: 5126590 (1992-06-01), Chern
patent: 5162668 (1992-11-01), Chih-Liang et al.
patent: 5252865 (1993-10-01), Davenport et al.
patent: 5267201 (1993-11-01), Foss et al.
patent: 5625315 (1997-04-01), Matsui et al.
patent: 6021056 (2000-02-01), Forbes et al.
patent: 6046625 (2000-04-01), Menichelli
patent: 2294584 (1976-07-01), None

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