Current memory

Static information storage and retrieval – Analog storage systems

Patent

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Details

365149, G11C 1300

Patent

active

057454000

ABSTRACT:
A current memory comprises an input which is connected via a switch which is closed on a phase .phi.1 of a clock signal to inputs of a coarse memory cell (M1) and a fine memory cell(M2). The coarse memory cell samples the input current on phase .phi.1a of the clock and outputs a current thereafter. The fine memory cell senses the difference between the input current and the output of the coarse memory on phase .phi.1b of the clock. A second switch which is closed on phase .phi.2 of the clock passes the combined outputs of the coarse and fine memories to an output. Two further switches are provided which are closed for a short time (sh1) at the start of phase .phi.1b. The two further switches discharge the stray capacitance (C.sub.n) at the node (2) to the voltage reference source via a terminal.

REFERENCES:
patent: 4094007 (1978-06-01), Minami
patent: 4272831 (1981-06-01), Ulrich
patent: 5027171 (1991-06-01), Reedy et al.

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