Current-controlled CMOS circuits with inductive broadbanding

Details Current-controlled CMOS circuits with inductive broadbanding Current-controlled CMOS circuits with inductive broadbanding

2001-09-26

2003-02-25

Tokar, Michael (Department: 2819)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

C326S086000, C327S052000

Reexamination Certificate

active

06525571

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates in general to high speed logic circuitry, and in particular to current-controlled CMOS (or C
3
MOS™) logic circuits with inductive broadbanding.
For a number of reasons CMOS is the logic family of choice in today's VLSI devices. Due to the complementary nature of its operation, CMOS logic consumes zero static power. CMOS also readily scales with technology. These two features are highly desirable given the drastic growth in demand for low power and portable electronic devices. Further, with the computer aided design (CAD) industry's focus on developing automated design tools for CMOS based technologies, the cost and the development time of CMOS VLSI devices has reduced significantly.
The one drawback of the CMOS logic family, however, remains its limited speed. That is, conventional CMOS logic has not achieved the highest attainable switching speeds made possible by modem sub-micron CMOS technologies. As a result of the speed limitations of conventional CMOS logic, integrated circuit applications in the Giga Hertz frequency range have had to look to alternative technologies such as ultra high speed bipolar circuits and Gallium Arsenide (GaAs). These alternative technologies, however, have drawbacks of their own that have made them more of a specialized field with limited applications as compared to silicon MOSFET that has had widespread use and support by the industry. In particular, compound semiconductors such as GaAs are more susceptible to defects that degrade device performance, and suffer from increased gate leakage current and reduced noise margins. Furthermore, attempts to reliably fabricate a high quality oxide layer using GaAs have not thus far met with success. This has made it difficult to fabricate GaAs FETs, limiting the GaAs technology to junction field-effect transistors (JFETs) or Schottky barrier metal semiconductor field-effect transistors (MESFETs). A major drawback of the bipolar technology, among others, is its higher current dissipation even for circuits that operate at lower frequencies.
SUMMARY OF THE INVENTION
A significant improvement in speed of operation of CMOS circuitry has been achieved by a family of CMOS logic that is based on current-controlled mechanism. Current-controlled CMOS (or C
3
MOS) logic is described in greater detail in commonly-assigned patent application Ser. No. 09/484,856 (Atty Dkt No. 019717-000310), entitled “Current-Controlled CMOS Logic Family,” by Hairapetian, which is hereby incorporated in its entirety for all purposes. The basic building block of the C
3
MOS logic family uses a pair of conventional MOSFETs that steer current between a pair of load devices in response to a difference between a pair of input signals. Thus, unlike conventional CMOS logic, C
3
MOS logic dissipates static current, but operates at much higher speeds.
According to one aspect of the invention, to further enhance speed of operation of circuits implemented in CMOS technology, the present invention introduces inductive elements in the C
3
MOS circuits. In a specific embodiment, a spiral inductor is inserted in series with the load devices of selected C
3
MOS structures that process high-bandwidth data signals. The resulting series combination of inductor and resistive element (e.g., polysilicon resistors) that is in parallel with an existing capacitive load provides a high impedance at a higher bandwidth than would be possible without the presence of the inductor. Optimized values for the inductors ensure appropriate placement of the circuit's natural frequencies in the complex plane to achieve fast rise and fall times with appropriate overshoot and undershoot. The present invention combines the use of this type of shunt peaking with C
3
MOS circuits that process broadband bi-level (i.e., digital as opposed to analog) differential signals. The combination of these characteristics allows for improvement of the output signal's inter-symbol interference without any increase in power dissipation.
According to another aspect of the invention, a multiplexer circuit includes C
3
MOS with inductive broadbanding to facilitate operation at ultra-high frequencies.
According to another aspect of the invention, a flip-flop is implemented utilizing C
3
MOS with inductive broadbanding to operate at ultrahigh frequencies.
According to another aspect of the invention, a complementary metal-oxide-semiconductor (CMOS) logic circuitry combines on the same silicon substrate, current-controlled MOSFET circuitry of the type described above for high speed signal processing, with conventional CMOS logic that does not dissipate static current. Examples of such combined circuitry include serializer/deserializer circuitry used in high speed serial links, high speed phase-locked loop dividers, and the like.
Other features and advantages of the invention will be apparent in view of the following detailed description and appended drawings.


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